[S83] | K. Herath, A. Prakash, S. A. Fahmy, and S. Thambipillai, “Power-Efficient Mapping of Large Applications on Modern Heterogeneous FPGAs,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, pp. 2508–2521, Dec. 2021, ISSN: 1937-4151, DOI: 10.1109/TCAD.2020.3047722. |
| @article{herath2020powerSMAT, | author | = | {Herath, Kalindu and Prakash, Alok and Fahmy, Suhaib A. and Thambipillai, Srikanthan}, | title | = | {Power-Efficient Mapping of Large Applications on Modern Heterogeneous {FPGAs}}, | doi | = | {10.1109/TCAD.2020.3047722}, | issn | = | {1937-4151}, | pages | = | {2508--2521}, | journal | = | {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, | month | = | dec, | publisher | = | {IEEE}, | year | = | {2021}, | } |
|
[S82] | F. Ning, G. Jiang, S.-K. Lam, C. Ou, P. He, and Y. Sun, “Passenger-Centric Vehicle Routing for First-Mile Transportation Considering Request Uncertainty,” Information Sciences, Elsevier, pp. 241–261, Sep. 2021, ISSN: 0020-0255, DOI: 10.1016/j.ins.2021.04.054. |
| @article{ning2020passengerSMAT, | title | = | {Passenger-Centric Vehicle Routing for First-Mile Transportation Considering Request Uncertainty}, | author | = | {Ning, Fangxin and Jiang, Guiyuan and Lam, Siew-Kei and Ou, Changhai and He, Peilan and Sun, Yidan}, | journal | = | {Information Sciences}, | publisher | = | {Elsevier}, | pages | = | {241--261}, | year | = | {2021}, | month | = | sep, | issn | = | {0020-0255}, | doi | = | {10.1016/j.ins.2021.04.054}, | } |
|
[S81] | C. Zhou, M. Wu, and S.-K. Lam, “Group Cost-Sensitive BoostLR With Vector Form Decorrelated Filters for Pedestrian Detection,” IEEE Transactions on Intelligent Transportation Systems, vol. 21, no. 12, IEEE, pp. 5022–5035, Dec. 2020, ISSN: 1558-0016, DOI: 10.1109/TITS.2019.2948044. |
| @article{zhou2020groupSMAT, | author | = | {Zhou, Chengju and Wu, Meiqing and Lam, Siew-Kei}, | journal | = | {IEEE Transactions on Intelligent Transportation Systems}, | title | = | {Group Cost-Sensitive {BoostLR} With Vector Form Decorrelated Filters for Pedestrian Detection}, | publisher | = | {IEEE}, | year | = | {2020}, | month | = | dec, | volume | = | {21}, | number | = | {12}, | pages | = | {5022--5035}, | issn | = | {1558-0016}, | doi | = | {10.1109/TITS.2019.2948044}, | } |
|
[S80] | K. Sharma, N. Ramakrishnan, A. Prakash, S. K. Lam, and T. Srikanthan, “Evaluating the Merits of Ranking in Structured Network Pruning,” in 2020 IEEE 40th International Conference on Distributed Computing Systems (ICDCS), Singapore, Singapore: IEEE, Nov. 2020, pp. 1389–1396, DOI: 10.1109/ICDCS47774.2020.00183. |
| @inproceedings{sharma2020evaluatingSMAT, | author | = | {Sharma, Kuldeep and Ramakrishnan, Nirmala and Prakash, Alok and Lam, Siew Kei and Srikanthan, Thambipillai}, | title | = | {Evaluating the Merits of Ranking in Structured Network Pruning}, | booktitle | = | {2020 IEEE 40th International Conference on Distributed Computing Systems (ICDCS)}, | year | = | {2020}, | month | = | nov, | pages | = | {1389--1396}, | address | = | {Singapore, Singapore}, | publisher | = | {IEEE}, | doi | = | {10.1109/ICDCS47774.2020.00183}, | } |
|
[S79] | C. Ou, S.-K. Lam, C. Zhou, G. Jiang, and F. Zhang, “A Lightweight Detection Algorithm For Collision-Optimized Divide-and-Conquer Attacks,” IEEE Transactions on Computers, vol. 69, no. 11, IEEE, pp. 1694–1706, Nov. 2020, ISSN: 1557-9956, DOI: 10.1109/TC.2020.3002795. |
| @article{ou2020ASMATa, | author | = | {Ou, Changhai and Lam, Siew-Kei and Zhou, Chengju and Jiang, Guiyuan and Zhang, Fan}, | journal | = | {IEEE Transactions on Computers}, | title | = | {A Lightweight Detection Algorithm For Collision-Optimized Divide-and-Conquer Attacks}, | publisher | = | {IEEE}, | year | = | {2020}, | month | = | nov, | volume | = | {69}, | number | = | {11}, | pages | = | {1694--1706}, | issn | = | {1557-9956}, | doi | = | {10.1109/TC.2020.3002795}, | } |
|
[S78] | A. Prakash, N. Ramakrishnan, K. Garg, and T. Srikanthan, “Accelerating Computer Vision Algorithms on Heterogeneous Edge Computing Platforms,” in 2020 IEEE International Workshop on Signal Processing Systems, Coimbra, Portugal: IEEE, Oct. 2020, pp. 1–6, DOI: 10.1109/SiPS50750.2020.9195221. |
| @inproceedings{prakash2020acceleratingSMAT, | author | = | {Prakash, Alok and Ramakrishnan, Nirmala and Garg, Kratika and Srikanthan, Thambipillai}, | booktitle | = | {2020 IEEE International Workshop on Signal Processing Systems}, | title | = | {Accelerating Computer Vision Algorithms on Heterogeneous Edge Computing Platforms}, | year | = | {2020}, | month | = | oct, | pages | = | {1--6}, | publisher | = | {IEEE}, | doi | = | {10.1109/SiPS50750.2020.9195221}, | address | = | {Coimbra, Portugal}, | } |
|
[S77] | D. Piyasena, M. Thathsara, S. Kanagarajah, S. K. Lam, and M. Wu, “Dynamically Growing Neural Network Architecture for Lifelong Deep Learning on the Edge,” in Proceedings of the 2020 30th International Conference on Field-Programmable Logic and Applications (FPL), Gothenburg, Sweden: IEEE, Oct. 2020, pp. 262–268, DOI: 10.1109/FPL50879.2020.00051. |
| @inproceedings{duvindu2020dynamicallySMAT, | author | = | {Piyasena, Duvindu and Thathsara, Miyuru and Kanagarajah, Sathursan and Lam, Siew Kei and Wu, Meiqing}, | booktitle | = | {Proceedings of the 2020 30th International Conference on Field-Programmable Logic and Applications (FPL)}, | title | = | {Dynamically Growing Neural Network Architecture for Lifelong Deep Learning on the Edge}, | publisher | = | {IEEE}, | year | = | {2020}, | month | = | oct, | address | = | {Gothenburg, Sweden}, | pages | = | {262--268}, | doi | = | {10.1109/FPL50879.2020.00051}, | } |
|
[S76] | C. Ou, C. Zhou, and S.-K. Lam, “A First Study of Compressive Sensing for Side-Channel Leakage Sampling,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, no. 10, IEEE, pp. 2166–2177, Oct. 2020, ISSN: 1937-4151, DOI: 10.1109/TCAD.2019.2960337. |
| @article{ou2020ASMATb, | author | = | {Ou, Changhai and Zhou, Chengju and Lam, Siew-Kei}, | journal | = | {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, | title | = | {A First Study of Compressive Sensing for Side-Channel Leakage Sampling}, | publisher | = | {IEEE}, | year | = | {2020}, | month | = | oct, | volume | = | {39}, | number | = | {10}, | pages | = | {2166--2177}, | issn | = | {1937-4151}, | doi | = | {10.1109/TCAD.2019.2960337}, | } |
|
[S75] | C. Ou, C. Zhou, S.-K. Lam, and G. Jiang, “Multiple-Differential Mechanism for Collision-Optimized Divide-and-Conquer Attacks,” IEEE Transactions on Information Forensics and Security, vol. 16, IEEE, pp. 418–430, Aug. 2020, ISSN: 1556-6021, DOI: 10.1109/TIFS.2020.3014490. |
| @article{ou2021multipleSMAT, | author | = | {Ou, Changhai and Zhou, Chengju and Lam, Siew-Kei and Jiang, Guiyuan}, | journal | = | {IEEE Transactions on Information Forensics and Security}, | title | = | {Multiple-Differential Mechanism for Collision-Optimized Divide-and-Conquer Attacks}, | publisher | = | {IEEE}, | year | = | {2020}, | month | = | aug, | volume | = | {16}, | pages | = | {418--430}, | issn | = | {1556-6021}, | doi | = | {10.1109/TIFS.2020.3014490}, | } |
|
[S74] | A. Prakash, S. Wang, and T. Mitra, “Mobile Application Processors: Techniques for Software Power-Performance Optimization,” IEEE Consumer Electronics Magazine, vol. 9, no. 4, IEEE, pp. 67–76, Jun. 2020, DOI: 10.1109/MCE.2020.2969171. |
| @article{prakash2020mobileSMAT, | author | = | {Prakash, Alok and Wang, Siqi and Mitra, Tulika}, | journal | = | {IEEE Consumer Electronics Magazine}, | title | = | {Mobile Application Processors: Techniques for Software Power-Performance Optimization}, | year | = | {2020}, | month | = | jun, | number | = | {4}, | pages | = | {67--76}, | volume | = | {9}, | doi | = | {10.1109/MCE.2020.2969171}, | publisher | = | {IEEE}, | } |
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[S73] | D. Bhattacharjee, Y. Tavva, A. Easwaran, and A. Chattopadhyay, “Crossbar-Constrained Technology Mapping for ReRAM Based In-Memory Computing,” IEEE Transactions on Computers, vol. 69, no. 5, IEEE, pp. 734–748, May 2020, ISSN: 1557-9956, DOI: 10.1109/TC.2020.2964671. |
| @article{bhattacharjee2020crossbarSMAT, | author | = | {Bhattacharjee, Debjyoti and Tavva, Yaswanth and Easwaran, Arvind and Chattopadhyay, Anupam}, | journal | = | {IEEE Transactions on Computers}, | title | = | {Crossbar-Constrained Technology Mapping for ReRAM Based In-Memory Computing}, | publisher | = | {IEEE}, | issn | = | {1557-9956}, | year | = | {2020}, | month | = | may, | volume | = | {69}, | number | = | {5}, | pages | = | {734--748}, | doi | = | {10.1109/TC.2020.2964671}, | } |
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[S72] | A. Baksi, D. Saha, and S. Sarkar, “To Infect Or Not To Infect: A Critical Analysis Of Infective Countermeasures In Fault Attacks,” Journal of Cryptographic Engineering (JCEN), Springer, May 2020, DOI: 10.1007/s13389-020-00224-9. |
| @article{baksi2020toSMAT, | title | = | {To Infect Or Not To Infect: A Critical Analysis Of Infective Countermeasures In Fault Attacks}, | author | = | {Baksi, Anubhab and Saha, Dhiman and Sarkar, Sumanta}, | journal | = | {Journal of Cryptographic Engineering (JCEN)}, | year | = | {2020}, | month | = | may, | publisher | = | {Springer}, | doi | = | {10.1007/s13389-020-00224-9}, | } |
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[S71] | D. Wijesundera, K. Shah, K. Liyanage, A. Prakash, T. Srikanthan, and T. Perera, “Technique for Vendor and Device Agnostic Hardware Area-Time Estimation,” in Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer International Publishing, Mar. 2020, pp. 166–177, DOI: 10.1007/978-3-030-44534-8_13. |
| @inproceedings{wijesundera2020techniqueSMAT, | author | = | {Wijesundera, Deshya and Shah, Kushagra and Liyanage, Kisaru and Prakash, Alok and Srikanthan, Thambipillai and Perera, Thilina}, | title | = | {Technique for Vendor and Device Agnostic Hardware Area-Time Estimation}, | booktitle | = | {Applied Reconfigurable Computing. Architectures, Tools, and Applications}, | year | = | {2020}, | month | = | mar, | publisher | = | {Springer International Publishing}, | pages | = | {166--177}, | doi | = | {10.1007/978-3-030-44534-8_13}, | } |
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[S70] | P. He, G. Jiang, S.-K. Lam, and Y. Sun, “Learning heterogeneous traffic patterns for travel time prediction of bus journeys,” Information Sciences, vol. 512, Elsevier, pp. 1394–1406, Feb. 2020, DOI: 10.1016/j.ins.2019.10.073. |
| @article{he2020learningSMAT, | title | = | {Learning heterogeneous traffic patterns for travel time prediction of bus journeys}, | author | = | {He, Peilan and Jiang, Guiyuan and Lam, Siew{\hyp}Kei and Sun, Yidan}, | journal | = | {Information Sciences}, | volume | = | {512}, | year | = | {2020}, | month | = | feb, | pages | = | {1394--1406}, | publisher | = | {Elsevier}, | doi | = | {10.1016/j.ins.2019.10.073}, | } |
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[S69] | A. Khalid, G. Paul, and A. Chattopadhyay, “Domain Specific High-Level Synthesis for Cryptographic Workloads,” in Computer Architecture and Design Methodologies, Springer Singapore, 2019, DOI: 10.1007/978-981-10-1070-5. |
| @inproceedings{Ayesha2019DomainSMAT, | title | = | {Domain Specific High{\hyp}Level Synthesis for Cryptographic Workloads}, | author | = | {Khalid, Ayesha and Paul, Goutam and Chattopadhyay, Anupam}, | booktitle | = | {Computer Architecture and Design Methodologies}, | year | = | {2019}, | publisher | = | {Springer Singapore}, | doi | = | {10.1007/978-981-10-1070-5}, | } |
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[S68] | G. Jiang, S.-K. Lam, F. Ning, P. He, and J. Xie, “Peak-hour Vehicle Routing for First-mile Transportation: Problem Formulation and Algorithms,” IEEE Transactions on Intelligent Transportation Systems, IEEE, pp. 1–14, 2019, DOI: 10.1109/TITS.2019.2926065. |
| @article{Jiang2019PeakSMAT, | title | = | {Peak{\hyp}hour Vehicle Routing for First{\hyp}mile Transportation: Problem Formulation and Algorithms}, | author | = | {Jiang, Guiyuan and Lam, Siew{\hyp}Kei and Ning, Fangxin and He, Peilan and Xie, Jidong}, | journal | = | {IEEE Transactions on Intelligent Transportation Systems}, | year | = | {2019}, | pages | = | {1--14}, | publisher | = | {IEEE}, | doi | = | {10.1109/TITS.2019.2926065}, | } |
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[S67] | D. Wijesundera, K. Liyanage, A. Prakash, T. Srikanthan, and T. Perera, “An Iterative Technique for Runtime Efficient Hardware-Software Partitioning,” in 2019 International Conference on Field-Programmable Technology (ICFPT), Tianjin, China, China: IEEE, Dec. 2019, pp. 403–406, DOI: 10.1109/ICFPT47387.2019.00078. |
| @inproceedings{wijesundera2019anSMAT, | author | = | {Wijesundera, Deshya and Liyanage, Kisaru and Prakash, Alok and Srikanthan, Thambipillai and Perera, Thilina}, | booktitle | = | {2019 International Conference on Field-Programmable Technology (ICFPT)}, | title | = | {An Iterative Technique for Runtime Efficient Hardware-Software Partitioning}, | year | = | {2019}, | month | = | dec, | pages | = | {403--406}, | publisher | = | {IEEE}, | doi | = | {10.1109/ICFPT47387.2019.00078}, | address | = | {Tianjin, China, China}, | } |
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[S66] | D. Wijesundera, N. Dissanayake, A. Prakash, T. Srikanthan, and D. Anhettigama, “Dependency-Aware Clustering for Variable-Grained Hardware-Software Partitioning,” in 2019 International Conference on Field-Programmable Technology (ICFPT), Tianjin, China, China: IEEE, Dec. 2019, pp. 411–414, DOI: 10.1109/ICFPT47387.2019.00080. |
| @inproceedings{wijesundera2019dependencySMAT, | author | = | {Wijesundera, Deshya and Dissanayake, Nadeeshan and Prakash, Alok and Srikanthan, Thambipillai and Anhettigama, Damith}, | booktitle | = | {2019 International Conference on Field-Programmable Technology (ICFPT)}, | title | = | {Dependency-Aware Clustering for Variable-Grained Hardware-Software Partitioning}, | year | = | {2019}, | month | = | dec, | pages | = | {411--414}, | publisher | = | {IEEE}, | doi | = | {10.1109/ICFPT47387.2019.00080}, | address | = | {Tianjin, China, China}, | } |
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[S65] | A. Jati, N. Gupta, A. Chattopadhyay, S. K. Sanadhya, and D. Chang, “Threshold Implementations of $\mathttGIFT$ : A Trade-Off Analysis,” IEEE Transactions on Information Forensics and Security, vol. 15, IEEE, pp. 2110–2120, Dec. 2019, ISSN: 1556-6021, DOI: 10.1109/TIFS.2019.2957974. |
| @article{jati2020thresholdSMAT, | author | = | {Jati, Arpan and Gupta, Naina and Chattopadhyay, Anupam and Sanadhya, Somitra Kumar and Chang, Donghoon}, | journal | = | {IEEE Transactions on Information Forensics and Security}, | title | = | {Threshold Implementations of $\mathtt{GIFT}$ : A Trade-Off Analysis}, | publisher | = | {IEEE}, | issn | = | {1556-6021}, | year | = | {2019}, | month | = | dec, | volume | = | {15}, | pages | = | {2110--2120}, | doi | = | {10.1109/TIFS.2019.2957974}, | } |
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[S64] | T. Perera, A. Prakash, D. Wijesundera, T. Srikanthan, and C. N. Gamage, “Cluster-first, Route-second Heuristic for EV Scheduling in On-demand Public Transit,” in Proceedings of the 9th International Conference on Cybernetics and Intelligent Systems and Robotics, Automation and Mechatronics (CIS-RAM), Bangkok, Thailand: IEEE, Nov. 2019, pp. 176–181, DOI: 10.1109/CIS-RAM47153.2019.9095840. |
| @inproceedings{Perera2019bClusterSMAT, | title | = | {Cluster{\hyp}first, Route{\hyp}second Heuristic for {EV} Scheduling in On{\hyp}demand Public Transit}, | author | = | {Perera, Thilina and Prakash, Alok and Wijesundera, Deshya and Srikanthan, Thambipillai and Gamage, Chathura Nagoda}, | booktitle | = | {Proceedings of the 9th International Conference on Cybernetics and Intelligent Systems and Robotics, Automation and Mechatronics (CIS{\hyp}RAM)}, | year | = | {2019}, | month | = | nov, | address | = | {Bangkok, Thailand}, | pages | = | {176--181}, | publisher | = | {IEEE}, | doi | = | {10.1109/CIS-RAM47153.2019.9095840}, | } |
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[S63] | P. He, Y. Sun, G. Jiang, and S.-K. Lam, “Predicting Travel Time of Bus Journeys with Alternative Bus Services,” in Proceedings of the 2019 IEEE International Conference on Data Mining Workshops, ICDM Workshops 2019, Beijing, China: IEEE, Nov. 2019, pp. 114–123, DOI: 10.1109/ICDMW.2019.00027. |
| @inproceedings{He2019PredictingSMAT, | title | = | {Predicting Travel Time of Bus Journeys with Alternative Bus Services}, | author | = | {He, Peilan and Sun, Yidan and Jiang, Guiyuan and Lam, Siew{\hyp}Kei}, | booktitle | = | {Proceedings of the 2019 IEEE International Conference on Data Mining Workshops, ICDM Workshops 2019}, | year | = | {2019}, | month | = | nov, | address | = | {Beijing, China}, | pages | = | {114--123}, | publisher | = | {IEEE}, | doi | = | {10.1109/ICDMW.2019.00027}, | } |
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[S62] | T. Perera, A. Prakash, and T. Srikanthan, “Genetic Algorithm Based Dynamic Scheduling of EV in a Demand Responsive Bus Service for First Mile Transit,” in Proceedings of the 22nd International Conference on Intelligent Transportation Systems (ITSC), Auckland, New Zealand, New Zealand: IEEE, Oct. 2019, pp. 3322–3327, DOI: 10.1109/ITSC.2019.8917141. |
| @inproceedings{Perera2019aGeneticSMAT, | title | = | {Genetic Algorithm Based Dynamic Scheduling of {EV} in a Demand Responsive Bus Service for First Mile Transit}, | author | = | {Perera, Thilina and Prakash, Alok and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 22nd International Conference on Intelligent Transportation Systems (ITSC)}, | year | = | {2019}, | month | = | oct, | address | = | {Auckland, New Zealand, New Zealand}, | pages | = | {3322--3327}, | publisher | = | {IEEE}, | doi | = | {10.1109/ITSC.2019.8917141}, | } |
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[S61] | D. Piyasena, R. Wickramasinghe, D. Paul, S.-K. Lam, and M. Wu, “Reducing Dynamic Power in Streaming CNN Hardware Accelerators by Exploiting Computational Redundancies,” in 2019 29th International Conference on Field Programmable Logic and Applications (FPL), Barcelona, Spain, Spain, Sep. 2019, pp. 354–359, DOI: 10.1109/FPL.2019.00063. |
| @inproceedings{piyasena2019reducingSMAT, | author | = | {Piyasena, Duvindu and Wickramasinghe, Rukshan and Paul, Debdeep and Lam, Siew{\hyp}Kei and Wu, Meiqing}, | booktitle | = | {2019 29th International Conference on Field Programmable Logic and Applications (FPL)}, | title | = | {Reducing Dynamic Power in Streaming CNN Hardware Accelerators by Exploiting Computational Redundancies}, | year | = | {2019}, | month | = | sep, | pages | = | {354--359}, | doi | = | {10.1109/FPL.2019.00063}, | address | = | {Barcelona, Spain, Spain}, | } |
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[S60] | D. Piyasena, R. Wickramasinghe, D. Paul, S.-K. Lam, and M. Wu, “Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator,” in 2019 IEEE 21st International Workshop on Multimedia Signal Processing (MMSP), Kuala Lumpur, Malaysia, Sep. 2019, pp. 1–6, DOI: 10.1109/MMSP.2019.8901777. |
| @inproceedings{piyasena2019loweringSMAT, | title | = | {Lowering Dynamic Power of a Stream{\hyp}based CNN Hardware Accelerator}, | author | = | {Piyasena, Duvindu and Wickramasinghe, Rukshan and Paul, Debdeep and Lam, Siew{\hyp}Kei and Wu, Meiqing}, | booktitle | = | {2019 IEEE 21st International Workshop on Multimedia Signal Processing (MMSP)}, | year | = | {2019}, | month | = | sep, | pages | = | {1--6}, | address | = | {Kuala Lumpur, Malaysia}, | doi | = | {10.1109/MMSP.2019.8901777}, | } |
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[S59] | G. R. Jagadeesh and T. Srikanthan, “Fast Computation of Clustered Many-to-many Shortest Paths and Its Application to Map Matching,” ACM Transactions on Spatial Algorithms and Systems, vol. 5, no. 3, ACM, pp. 17:1–17:20, Aug. 2019, DOI: 10.1145/3329676. |
| @article{Jagadeesh2019fastSMAT, | title | = | {Fast Computation of Clustered Many{\hyp}to{\hyp}many Shortest Paths and Its Application to Map Matching}, | author | = | {Jagadeesh, George Rosario and Srikanthan, Thambipillai}, | journal | = | {ACM Transactions on Spatial Algorithms and Systems}, | volume | = | {5}, | number | = | {3}, | year | = | {2019}, | month | = | aug, | pages | = | {17:1--17:20}, | publisher | = | {ACM}, | doi | = | {10.1145/3329676}, | } |
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[S58] | T. Perera, A. Prakash, and T. Srikanthan, “Genetic Algorithm based EV Scheduling for On-demand Public Transit System,” in Proceedings of the 2019 International Conference on Computational Science – ICCS 2019, Faro, Portugal, Jun. 2019, pp. 595–603, DOI: 10.1007/978-3-030-22750-0_56. |
| @inproceedings{Perera2019GeneticSMAT, | title | = | {Genetic Algorithm based {EV} Scheduling for On{\hyp}demand Public Transit System}, | author | = | {Perera, Thilina and Prakash, Alok and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 2019 International Conference on Computational Science -- ICCS 2019}, | year | = | {2019}, | month | = | jun, | pages | = | {595--603}, | address | = | {Faro, Portugal}, | doi | = | {10.1007/978-3-030-22750-0_56}, | } |
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[S57] | Y. Sun, G. Jiang, S.-K. Lam, S. Chen, and P. He, “Bus Travel Speed Prediction Using Attention Network of Heterogeneous Correlation Features,” in Proceedings of the 2019 SIAM International Conference on Data Mining (SDM), Calgary, Alberta, Canada, May 2019, pp. 73–81, DOI: 10.1137/1.9781611975673.9. |
| @inproceedings{Sun2019BusSMAT, | title | = | {Bus Travel Speed Prediction Using Attention Network of Heterogeneous Correlation Features}, | author | = | {Sun, Yidan and Jiang, Guiyuan and Lam, Siew{\hyp}Kei and Chen, Shicheng and He, Peilan}, | booktitle | = | {Proceedings of the 2019 SIAM International Conference on Data Mining (SDM)}, | pages | = | {73--81}, | year | = | {2019}, | month | = | may, | address | = | {Calgary, Alberta, Canada}, | organization | = | {SIAM}, | doi | = | {10.1137/1.9781611975673.9}, | } |
|
[S56] | K. Garg, N. Ramakrishnan, A. Prakash, and T. Srikanthan, “Rapid and Robust Background Modeling Technique for Low-cost Road Traffic Surveillance Systems,” IEEE Transactions on Intelligent Transportation Systems, IEEE, pp. 1–12, May 2019, DOI: 10.1109/TITS.2019.2917560. |
| @article{garg2019bRapidSMAT, | title | = | {Rapid and Robust Background Modeling Technique for Low{\hyp}cost Road Traffic Surveillance Systems}, | author | = | {Garg, Kratika and Ramakrishnan, Nirmala and Prakash, Alok and Srikanthan, Thambipillai}, | journal | = | {IEEE Transactions on Intelligent Transportation Systems}, | year | = | {2019}, | month | = | may, | pages | = | {1--12}, | publisher | = | {IEEE}, | doi | = | {10.1109/TITS.2019.2917560}, | } |
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[S55] | K. Garg, N. Ramakrishnan, A. Prakash, S. Thambipillai, and P. Bhatt, “Rapid Technique to Eliminate Moving Shadows for Accurate Vehicle Detection,” in Proceedings of the 2019 IEEE Winter Conference on Applications of Computer Vision (WACV), Hawaii, USA: IEEE, Jan. 2019, pp. 1970–1978, DOI: 10.1109/WACV.2019.00214. |
| @inproceedings{garg2019aRapidSMAT, | title | = | {Rapid Technique to Eliminate Moving Shadows for Accurate Vehicle Detection}, | author | = | {Garg, Kratika and Ramakrishnan, Nirmala and Prakash, Alok and Thambipillai, Srikanthan and Bhatt, Punit}, | booktitle | = | {Proceedings of the 2019 IEEE Winter Conference on Applications of Computer Vision (WACV)}, | year | = | {2019}, | month | = | jan, | pages | = | {1970--1978}, | address | = | {Hawaii, USA}, | publisher | = | {IEEE}, | doi | = | {10.1109/WACV.2019.00214}, | } |
|
[S54] | P. He, G. Jiang, S.-K. Lam, and D. Tang, “Travel-time Prediction of Bus Journey With Multiple Bus Trips,” IEEE Transactions on Intelligent Transportation Systems, IEEE, 2018, DOI: 10.1109/TITS.2018.2883342. |
| @article{He2018TravelSMAT, | title | = | {Travel{\hyp}time Prediction of Bus Journey With Multiple Bus Trips}, | author | = | {He, Peilan and Jiang, Guiyuan and Lam, Siew{\hyp}Kei and Tang, Dehua}, | journal | = | {IEEE Transactions on Intelligent Transportation Systems}, | year | = | {2018}, | publisher | = | {IEEE}, | doi | = | {10.1109/TITS.2018.2883342}, | } |
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[S53] | P. Tran, T. H. Pham, S.-K. Lam, M. Wu, and B. A. Jasani, “Stream-Based ORB Feature Extractor with Dynamic Power Optimization,” in Proceedings of the 2018 International Conference on Field-Programmable Technology (FPT), IEEE, Dec. 2018, pp. 94–101, DOI: 10.1109/FPT.2018.00024. |
| @inproceedings{Tran2018StreamSMAT, | author | = | {Tran, Phong and Pham, Thinh Hung and Lam, Siew-Kei and Wu, Meiqing and Jasani, Bhavan A.}, | booktitle | = | {Proceedings of the 2018 International Conference on Field{\hyp}Programmable Technology (FPT)}, | title | = | {Stream{\hyp}Based {ORB} Feature Extractor with Dynamic Power Optimization}, | year | = | {2018}, | month | = | dec, | pages | = | {94--101}, | publisher | = | {IEEE}, | doi | = | {10.1109/FPT.2018.00024}, | } |
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[S52] | T. H. Pham, P. Tran, and S.-K. Lam, “High-Throughput and Area-Optimized Architecture for rBRIEF Feature Extraction,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, pp. 747–756, Dec. 2018, DOI: 10.1109/TVLSI.2018.2881105. |
| @article{pham2018highSMAT, | author | = | {Pham, Thinh Hung and Tran, Phong and Lam, Siew{\hyp}Kei}, | journal | = | {IEEE Transactions on Very Large Scale Integration (VLSI) Systems}, | title | = | {High{\hyp}Throughput and Area{\hyp}Optimized Architecture for rBRIEF Feature Extraction}, | year | = | {2018}, | month | = | dec, | pages | = | {747--756}, | doi | = | {10.1109/TVLSI.2018.2881105}, | publisher | = | {IEEE}, | } |
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[S51] | K. Herath, A. Prakash, J. Guiyuan, and T. Srikanthan, “Ant Colony Optimization based Module Footprint Selection and Placement for Lowering Power in Large FPGA Designs,” in 2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, Dec. 2018, pp. 1–8, DOI: 10.1109/RECONFIG.2018.8641731. |
| @inproceedings{herath2018antSMAT, | author | = | {Herath, Kalindu and Prakash, Alok and Guiyuan, Jiang and Srikanthan, Thambipillai}, | booktitle | = | {2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, | title | = | {Ant Colony Optimization based Module Footprint Selection and Placement for Lowering Power in Large {FPGA} Designs}, | year | = | {2018}, | month | = | dec, | pages | = | {1--8}, | publisher | = | {IEEE}, | doi | = | {10.1109/RECONFIG.2018.8641731}, | } |
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[S50] | T. Perera, A. Prakash, and T. Srikanthan, “A Hybrid Methodology for Optimal Fleet Management in an Electric Vehicle Based Flexible Bus Service,” in Proceedings of the 15th International Conference on Control, Automation, Robotics and Vision (ICARCV), Singapore, Nov. 2018, pp. 331–336, DOI: 10.1109/ICARCV.2018.8581345. |
| @inproceedings{Perera2018bASMAT, | title | = | {A Hybrid Methodology for Optimal Fleet Management in an Electric Vehicle Based Flexible Bus Service}, | author | = | {Perera, Thilina and Prakash, Alok and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 15th International Conference on Control, Automation, Robotics and Vision (ICARCV)}, | year | = | {2018}, | month | = | nov, | pages | = | {331--336}, | address | = | {Singapore}, | doi | = | {10.1109/ICARCV.2018.8581345}, | } |
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[S49] | T. Perera, C. N. Gamage, A. Prakash, and T. Srikanthan, “A Simulation Framework for a Real-time Demand Responsive Public Transit System,” in Proceedings of the 21st International Conference on Intelligent Transportation Systems (ITSC), Maui, Hawaii, Nov. 2018, pp. 608–613, DOI: 10.1109/ITSC.2018.8569281. |
| @inproceedings{Perera2018aASMAT, | title | = | {A Simulation Framework for a Real{\hyp}time Demand Responsive Public Transit System}, | author | = | {Perera, Thilina and Gamage, Chathura Nagoda and Prakash, Alok and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 21st International Conference on Intelligent Transportation Systems (ITSC)}, | year | = | {2018}, | month | = | nov, | pages | = | {608--613}, | address | = | {Maui, Hawaii}, | doi | = | {10.1109/ITSC.2018.8569281}, | } |
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[S48] | M. Swagata, B. Debjyoti, T. Yaswanth, and A. Chattopadhyay, “ReRAM-based In-memory Computation of Galois Field Arithmetic,” in Proceedings of the IEEE/IFIP VLSI-SoC, Verona, Italy, Italy: IEEE, Oct. 2018, pp. 1–6, DOI: 10.1109/VLSI-SoC.2018.8644772. |
| @inproceedings{Swagata2018ReRAMSMAT, | author | = | {Swagata, Mandal and Debjyoti, Bhattacharjee and Yaswanth, Tavva and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the IEEE/IFIP VLSI{\hyp}SoC}, | title | = | {{ReRAM}{\hyp}based In{\hyp}memory Computation of Galois Field Arithmetic}, | year | = | {2018}, | month | = | oct, | pages | = | {1--6}, | publisher | = | {IEEE}, | doi | = | {10.1109/VLSI-SoC.2018.8644772}, | address | = | {Verona, Italy, Italy}, | } |
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[S47] | A. Prakash, C. T. Clarke, S.-K. Lam, and T. Srikanthan, “Rapid Memory-aware Selection of Hardware Accelerators in Programmable SoC Design,” IEEE Transactions on Very Large Scale Integration Systems, vol. 26, pp. 445–456, Sep. 2018, DOI: 10.1109/TVLSI.2017.2769125. |
| @article{prakash2018rapidSMAT, | title | = | {Rapid Memory{\hyp}aware Selection of Hardware Accelerators in Programmable {SoC} Design}, | author | = | {Prakash, Alok and Clarke, Christopher T. and Lam, Siew{\hyp}Kei and Srikanthan, Thambipillai}, | journal | = | {IEEE Transactions on Very Large Scale Integration Systems}, | volume | = | {26}, | year | = | {2018}, | month | = | sep, | pages | = | {445--456}, | doi | = | {10.1109/TVLSI.2017.2769125}, | } |
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[S46] | S.-K. Lam, T. C. Lim, M. Wu, B. Cao, and B. Jasani, “Area-time Efficient FAST Corner Detector Using Data-path Transposition,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, pp. 1224–1228, Sep. 2018, DOI: 10.1109/TCSII.2017.2752259. |
| @article{Lam2018bAreaSMAT, | title | = | {Area{\hyp}time Efficient {FAST} Corner Detector Using Data{\hyp}path Transposition}, | author | = | {Lam, Siew{\hyp}Kei and Lim, Teck Chuan and Wu, Meiqing and Cao, Bin and Jasani, Bhavan}, | journal | = | {IEEE Transactions on Circuits and Systems II: Express Briefs}, | volume | = | {65}, | year | = | {2018}, | month | = | sep, | pages | = | {1224--1228}, | doi | = | {10.1109/TCSII.2017.2752259}, | } |
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[S45] | B. Jasani, S.-K. Lam, P. K. Meher, and M. Wu, “Threshold-guided Design and Optimization for Harris Corner Detector Architecture,” IEEE Transactions on Circuits and Systems for Video Technology, pp. 1–1, Sep. 2018, DOI: 10.1109/TCSVT.2017.2757998. |
| @article{Jasani2018ThresholdSMAT, | title | = | {Threshold{\hyp}guided Design and Optimization for Harris Corner Detector Architecture}, | author | = | {Jasani, Bhavan and Lam, Siew{\hyp}Kei and Meher, Pramod Kumar and Wu, Meiqing}, | journal | = | {IEEE Transactions on Circuits and Systems for Video Technology}, | year | = | {2018}, | month | = | sep, | pages | = | {1--1}, | doi | = | {10.1109/TCSVT.2017.2757998}, | } |
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[S44] | D. Wijesundera, A. Prakash, T. Srikanthan, and A. Ihalage, “Framework for Rapid Performance Estimation of Embedded Soft Core Processors,” ACM Transactions on Reconfigurable Technology and Systems, vol. 11, pp. 9:1–9:21, Jul. 2018, DOI: 10.1145/3195801. |
| @article{Wijesundera2018FrameworkSMAT, | title | = | {Framework for Rapid Performance Estimation of Embedded Soft Core Processors}, | author | = | {Wijesundera, Deshya and Prakash, Alok and Srikanthan, Thambipillai and Ihalage, Achintha}, | journal | = | {ACM Transactions on Reconfigurable Technology and Systems}, | volume | = | {11}, | year | = | {2018}, | month | = | jul, | pages | = | {9:1--9:21}, | doi | = | {10.1145/3195801}, | } |
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[S43] | R. Prasanna, S. Bhasin, J. Breier, and A. Chattopadhyay, “PPAP and iPPAP: PLL-based Protection Against Physical Attacks,” in Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Hong Kong, China, Jul. 2018, pp. 620–625, DOI: 10.1109/ISVLSI.2018.00118. |
| @inproceedings{Ravi2018PPAPSMAT, | title | = | {{PPAP} and {iPPAP}: {PLL}{\hyp}based Protection Against Physical Attacks}, | author | = | {Prasanna, Ravi and Bhasin, Shivam and Breier, Jakub and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)}, | year | = | {2018}, | month | = | jul, | pages | = | {620--625}, | address | = | {Hong Kong, China}, | doi | = | {10.1109/ISVLSI.2018.00118}, | } |
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[S42] | K. Herath, A. Prakash, U. C. H. Kanewala, and T. Srikanthan, “Communication-aware Module Placement for Power Reduction in Large FPGA Designs,” in Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Hong Kong, China, Jul. 2018, pp. 209–214, DOI: 10.1109/ISVLSI.2018.00047. |
| @inproceedings{Herath2018CommunicationSMAT, | title | = | {Communication{\hyp}aware Module Placement for Power Reduction in Large {FPGA} Designs}, | author | = | {Herath, Kalindu and Prakash, Alok and Kanewala, Udaree Chathurangee Hiranthika and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)}, | year | = | {2018}, | month | = | jul, | pages | = | {209--214}, | address | = | {Hong Kong, China}, | doi | = | {10.1109/ISVLSI.2018.00047}, | } |
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[S41] | M. A. Elmohr, S. Kumar, M. Khairallah, and A. Chattopadhyay, “A Hardware-efficient Implementation of CLOC for on-chip Authenticated Encryption,” in Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Hong Kong, China, Jul. 2018, pp. 311–315, DOI: 10.1109/ISVLSI.2018.00064. |
| @inproceedings{Mahmoud2018ASMAT, | title | = | {A Hardware{\hyp}efficient Implementation of {CLOC} for on{\hyp}chip Authenticated Encryption}, | author | = | {Elmohr, Mahmoud A. and Kumar, Sachin and Khairallah, Mustafa and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)}, | year | = | {2018}, | month | = | jul, | pages | = | {311--315}, | address | = | {Hong Kong, China}, | doi | = | {10.1109/ISVLSI.2018.00064}, | } |
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[S40] | D. Bhattacharjee and A. Chattopadhyay, “Synthesis, Technology Mapping and Optimization for Emerging Technologies,” in Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Hong Kong, China, Jul. 2018, pp. 369–374, DOI: 10.1109/ISVLSI.2018.00074. |
| @inproceedings{Bhattacharjee2018SynthesisSMAT, | title | = | {Synthesis, Technology Mapping and Optimization for Emerging Technologies}, | author | = | {Bhattacharjee, Debjyoti and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)}, | year | = | {2018}, | month | = | jul, | pages | = | {369--374}, | address | = | {Hong Kong, China}, | doi | = | {10.1109/ISVLSI.2018.00074}, | } |
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[S39] | A. Baksi, V. Pudi, S. Mandal, and A. Chattopadhyay, “Lightweight ASIC Implementation of AEGIS-128,” in Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Hong Kong, China, Jul. 2018, pp. 251–256, DOI: 10.1109/ISVLSI.2018.00054. |
| @inproceedings{baksi2018LightweightSMAT, | title | = | {Lightweight {ASIC} Implementation of {AEGIS}{\hyp}128}, | author | = | {Baksi, Anubhab and Pudi, Vikramkumar and Mandal, Swagata and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)}, | year | = | {2018}, | month | = | jul, | pages | = | {251--256}, | address | = | {Hong Kong, China}, | doi | = | {10.1109/ISVLSI.2018.00054}, | } |
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[S38] | D. Wijesundera, A. Prakash, T. Perera, K. Herath, and T. Srikanthan, “Wibheda+: Framework for Data Dependency-aware Multi-constrained Hardware-software Partitioning in FPGA-based SoCs for IoT Applications,” in Proceedings of the 9th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Toronto, ON, Canada: ACM, Jun. 2018, pp. 3:1–3:6, DOI: 10.1145/3241793.3241796. |
| @inproceedings{Wijesundera2018bFrameworkSMAT, | title | = | {Wibheda+: Framework for Data Dependency{\hyp}aware Multi{\hyp}constrained Hardware{\hyp}software Partitioning in {FPGA}{\hyp}based {SoCs} for {IoT} Applications}, | author | = | {Wijesundera, Deshya and Prakash, Alok and Perera, Thilina and Herath, Kalindu and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 9th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies}, | year | = | {2018}, | month | = | jun, | pages | = | {3:1--3:6}, | address | = | {Toronto, ON, Canada}, | publisher | = | {ACM}, | doi | = | {10.1145/3241793.3241796}, | } |
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[S37] | T. Perera, A. Prakash, C. N. Gamage, and T. Srikanthan, “Hybrid Genetic Algorithm for an On-demand First Mile Transit System Using Electric Vehicles,” in Proceedings of the 2018 International Conference on Computational Science – ICCS 2018, Wuxi, China, Jun. 2018, pp. 98–113, DOI: 10.1007/978-3-319-93698-7_8. |
| @inproceedings{Perera2018HybridSMAT, | title | = | {Hybrid Genetic Algorithm for an On{\hyp}demand First Mile Transit System Using Electric Vehicles}, | author | = | {Perera, Thilina and Prakash, Alok and Gamage, Chathura Nagoda and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 2018 International Conference on Computational Science -- ICCS 2018}, | year | = | {2018}, | month | = | jun, | pages | = | {98--113}, | address | = | {Wuxi, China}, | doi | = | {10.1007/978-3-319-93698-7_8}, | } |
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[S36] | S. Kumar, S. Jha, S. K. Pandey, and A. Chattopadhyay, “A Security Model for Intelligent Vehicles and Smart Traffic Infrastructure,” in Proceedings of the IEEE Intelligent Vehicles Symposium, Changshu, China: IEEE, Jun. 2018, pp. 162–167, DOI: 10.1109/IVS.2018.8500423. |
| @inproceedings{Sachin2018ASMAT, | author | = | {Kumar, Sachin and Jha, Sonu and Pandey, Sumit Kumar and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the IEEE Intelligent Vehicles Symposium}, | title | = | {A Security Model for Intelligent Vehicles and Smart Traffic Infrastructure}, | year | = | {2018}, | month | = | jun, | pages | = | {162--167}, | publisher | = | {IEEE}, | doi | = | {10.1109/IVS.2018.8500423}, | address | = | {Changshu, China}, | } |
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[S35] | M. M. Wong, H.-Y. Jawad, S. Suman, and A. Chattopadhyay, “A New High Throughput and Area Efficient SHA-3 Implementation,” in Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS-2018), Florence, May 2018, pp. 1–5, DOI: 10.1109/ISCAS.2018.8351649. |
| @inproceedings{wong2018newSMAT, | title | = | {A New High Throughput and Area Efficient {SHA{\hyp}3} Implementation}, | author | = | {Wong, Ming Ming and Jawad, Haj{\hyp}Yahya and Suman, Sau and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS{\hyp}2018)}, | year | = | {2018}, | month | = | may, | pages | = | {1--5}, | address | = | {Florence}, | doi | = | {10.1109/ISCAS.2018.8351649}, | } |
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[S34] | V. Pudi, A. Chattopadhyay, and L. Kwok-Yan, “Efficient and Lightweight Quantized Compressive Sensing Using Mu-law,” in Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS-2018), Florence, May 2018, pp. 1–5, DOI: 10.1109/ISCAS.2018.8351505. |
| @inproceedings{pudi2018efficientSMAT, | title | = | {Efficient and Lightweight Quantized Compressive Sensing Using Mu{\hyp}law}, | author | = | {Pudi, Vikramkumar and Chattopadhyay, Anupam and Kwok{\hyp}Yan, Lam}, | booktitle | = | {Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS{\hyp}2018)}, | year | = | {2018}, | month | = | may, | pages | = | {1--5}, | address | = | {Florence}, | doi | = | {10.1109/ISCAS.2018.8351505}, | } |
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[S33] | S. Kumar, J. H. Yahya, and A. Chattopadhyay, “Efficient Hardware Accelerator for NORX Authenticated Encryption,” in Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS-2018), Florence, May 2018, pp. 195–198, DOI: 10.1109/ISCAS.2018.8351145. |
| @inproceedings{kumar2018efficientSMAT, | title | = | {Efficient Hardware Accelerator for {NORX} Authenticated Encryption}, | author | = | {Kumar, Sachin and Yahya, Jawad Haj and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS-2018)}, | year | = | {2018}, | month | = | may, | pages | = | {195--198}, | address | = | {Florence}, | doi | = | {10.1109/ISCAS.2018.8351145}, | } |
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[S32] | K. Herath, A. Prakash, and T. Srikanthan, “Performance Estimation of FPGA Modules for Modular Design Methodology using Artificial Neural Network,” in Proceedings of the 14th International Symposium on Applied Reconfigurable Computing, Santorini, Greece, May 2018, pp. 105–118, DOI: 10.1007/978-3-319-78890-6_9. |
| @inproceedings{Herath2018PerformanceSMAT, | title | = | {Performance Estimation of {FPGA} Modules for Modular Design Methodology using Artificial Neural Network}, | author | = | {Herath, Kalindu and Prakash, Alok and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 14th International Symposium on Applied Reconfigurable Computing}, | year | = | {2018}, | month | = | may, | pages | = | {105--118}, | address | = | {Santorini, Greece}, | doi | = | {10.1007/978-3-319-78890-6_9}, | } |
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[S31] | D. Wijesundera, A. Prakash, T. Perera, K. Herath, and T. Srikanthan, “Wibheda: Framework for Data Dependency-aware Multi-constrained Hardware-software Partitioning in FPGA-based SoCs for IoT Devices,” in Proceedings of the 26th IEEE International Symposium on Field-Programmable Custom Computing Machines, Boulder, CO, USA: IEEE, Apr. 2018, pp. 213–213, DOI: 10.1109/FCCM.2018.00047. |
| @inproceedings{Wijesundera2018aFrameworkSMAT, | author | = | {Wijesundera, Deshya and Prakash, Alok and Perera, Thilina and Herath, Kalindu and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 26th IEEE International Symposium on Field{\hyp}Programmable Custom Computing Machines}, | title | = | {Wibheda: Framework for Data Dependency{\hyp}aware Multi{\hyp}constrained Hardware{\hyp}software Partitioning in {FPGA}{\hyp}based {SoCs} for {IoT} Devices}, | year | = | {2018}, | month | = | apr, | pages | = | {213--213}, | publisher | = | {IEEE}, | doi | = | {10.1109/FCCM.2018.00047}, | address | = | {Boulder, CO, USA}, | } |
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[S30] | T. Vatwani, A. Dutt, D. Bhattacharjee, and A. Chattopadhyay, “Floating Point Multiplication Mapping on ReRAM Based in-memory Computing Architecture,” in Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems (VLSID), Pune, India, Apr. 2018, pp. 439–444, DOI: 10.1109/VLSID.2018.104. |
| @inproceedings{vatwani2018FloatingSMAT, | title | = | {Floating Point Multiplication Mapping on {ReRAM} Based in{\hyp}memory Computing Architecture}, | author | = | {Vatwani, Tarun and Dutt, Arko and Bhattacharjee, Debjyoti and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems (VLSID)}, | year | = | {2018}, | month | = | apr, | pages | = | {439--444}, | address | = | {Pune, India}, | doi | = | {10.1109/VLSID.2018.104}, | } |
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[S29] | V. Pudi, A. Chattopadhyay, and K. Y. Lam, “Secure and Lightweight Compressive Sensing Using Stream Cipher,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, pp. 371–375, Mar. 2018, ISSN: 1549-7747, DOI: 10.1109/TCSII.2017.2715659. |
| @article{pudi2018secureSMAT, | title | = | {Secure and Lightweight Compressive Sensing Using Stream Cipher}, | author | = | {Pudi, Vikramkumar and Chattopadhyay, Anupam and Lam, Kwok Yan}, | journal | = | {IEEE Transactions on Circuits and Systems II: Express Briefs}, | volume | = | {65}, | year | = | {2018}, | month | = | mar, | pages | = | {371--375}, | issn | = | {1549-7747}, | doi | = | {10.1109/TCSII.2017.2715659}, | } |
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[S28] | M. Khairallah, R. Sadhukhan, R. Samanta, J. Breier, S. Bhasin, R. S. Chakraborty, A. Chattopadhyay, and D. Mukhopadhyay, “DFARPA: Differential Fault Attack Resistant Physical Design Automation,” in Proceedings of the 2018 Design, Automation Test in Europe Conference and Exhibition (DATE), Dresden, Germany, Mar. 2018, pp. 1171–1174, DOI: 10.23919/DATE.2018.8342190. |
| @inproceedings{khairallah2018dfarpaSMAT, | title | = | {{DFARPA}: Differential Fault Attack Resistant Physical Design Automation}, | author | = | {Khairallah, Mustafa and Sadhukhan, Rajat and Samanta, Radhamanjari and Breier, Jakub and Bhasin, Shivam and Chakraborty, Rajat Subhra and Chattopadhyay, Anupam and Mukhopadhyay, Debdeep}, | booktitle | = | {Proceedings of the 2018 Design, Automation Test in Europe Conference and Exhibition (DATE)}, | year | = | {2018}, | month | = | mar, | pages | = | {1171--1174}, | address | = | {Dresden, Germany}, | doi | = | {10.23919/DATE.2018.8342190}, | } |
|
[S27] | D. Bhattacharjee, L. Amaru, and A. Chattopadhyay, “Technology-aware Logic Synthesis for ReRAM Based In-memory Computing,” in Proceedings of the 2018 Design, Automation Test in Europe Conference Exhibition (DATE), Dresden, Germany, Mar. 2018, pp. 1435–1440, DOI: 10.23919/DATE.2018.8342237. |
| @inproceedings{Bhattacharjee2018TechnologySMAT, | title | = | {Technology{\hyp}aware Logic Synthesis for {ReRAM} Based In{\hyp}memory Computing}, | author | = | {Bhattacharjee, Debjyoti and Amaru, Luca and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the 2018 Design, Automation Test in Europe Conference Exhibition (DATE)}, | year | = | {2018}, | month | = | mar, | pages | = | {1435--1440}, | address | = | {Dresden, Germany}, | doi | = | {10.23919/DATE.2018.8342237}, | } |
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[S26] | S.-K. Lam, G. Jiang, M. Wu, and B. Cao, “Area-time Efficient Streaming Architecture for FAST and BRIEF Detector,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 2, IEEE, pp. 282–286, Feb. 2018, DOI: 10.1109/TCSII.2018.2846683. |
| @article{Lam2018AreaSMAT, | title | = | {Area{\hyp}time Efficient Streaming Architecture for {FAST} and {BRIEF} Detector}, | author | = | {Lam, Siew{\hyp}Kei and Jiang, Guiyuan and Wu, Meiqing and Cao, Bin}, | journal | = | {IEEE Transactions on Circuits and Systems II: Express Briefs}, | volume | = | {66}, | number | = | {2}, | pages | = | {282--286}, | year | = | {2018}, | month | = | feb, | publisher | = | {IEEE}, | doi | = | {10.1109/TCSII.2018.2846683}, | } |
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[S25] | A. Burg, A. Chattopadhyay, and K.-Y. Lam, “Wireless Communication and Security Issues for Cyber-physical Systems and the Internet-of-things,” Proceedings of the IEEE, vol. 106, pp. 38–60, Jan. 2018, DOI: 10.1109/JPROC.2017.2780172. |
| @article{Andreas2018wirelessSMAT, | title | = | {Wireless Communication and Security Issues for Cyber{\hyp}physical Systems and the Internet{\hyp}of{\hyp}things}, | author | = | {Burg, Andreas and Chattopadhyay, Anupam and Lam, Kwok{\hyp}Yan}, | journal | = | {Proceedings of the IEEE}, | year | = | {2018}, | month | = | jan, | volume | = | {106}, | pages | = | {38--60}, | doi | = | {10.1109/JPROC.2017.2780172}, | } |
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[S24] | M. Wu, S. K. Lam, and T. Srikanthan, “A Framework for Fast and Robust Visual Odometry,” IEEE Transactions on Intelligent Transportation Systems, vol. 18, no. 12, pp. 3433–3448, Dec. 2017, DOI: 10.1109/TITS.2017.2685433. |
| @article{wu2017frameworkSMAT, | title | = | {A Framework for Fast and Robust Visual Odometry}, | author | = | {Wu, Meiqing and Lam, Siew Kei and Srikanthan, Thambipillai}, | journal | = | {IEEE Transactions on Intelligent Transportation Systems}, | volume | = | {18}, | number | = | {12}, | year | = | {2017}, | month | = | dec, | pages | = | {3433--3448}, | doi | = | {10.1109/TITS.2017.2685433}, | } |
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[S23] | S. K. Lam, R. K. Bijarniya, and M. Wu, “Lowering Dynamic Power in Stream-based Harris Corner Detection Architecture,” in Proceedings of the 2017 International Conference on Field Programmable Technology (ICFPT), Melbourne, VIC, Australia, Dec. 2017, pp. 176–182, DOI: 10.1109/FPT.2017.8280136. |
| @inproceedings{lam2017loweringSMAT, | title | = | {Lowering Dynamic Power in Stream{\hyp}based Harris Corner Detection Architecture}, | author | = | {Lam, Siew Kei and Bijarniya, Rakesh Kumar and Wu, Meiqing}, | booktitle | = | {Proceedings of the 2017 International Conference on Field Programmable Technology (ICFPT)}, | year | = | {2017}, | month | = | dec, | pages | = | {176--182}, | address | = | {Melbourne, VIC, Australia}, | doi | = | {10.1109/FPT.2017.8280136}, | } |
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[S22] | G. R. Jagadeesh and T. Srikanthan, “Online Map-matching of Noisy and Sparse Location Data with Hidden Markov and Route Choice Models,” IEEE Transactions on Intelligent Transportation Systems, vol. 18, no. 9, pp. 2423–2434, Dec. 2017, DOI: 10.1109/TITS.2017.2647967. |
| @article{jagadeesh2017onlineSMAT, | title | = | {Online Map{\hyp}matching of Noisy and Sparse Location Data with Hidden Markov and Route Choice Models}, | author | = | {Jagadeesh, George Rosario and Srikanthan, Thambipillai}, | journal | = | {IEEE Transactions on Intelligent Transportation Systems}, | volume | = | {18}, | number | = | {9}, | year | = | {2017}, | month | = | dec, | pages | = | {2423--2434}, | doi | = | {10.1109/TITS.2017.2647967}, | } |
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[S21] | A. Chattopadhyay and K. Y. Lam, “Security of Autonomous Vehicle as a Cyber-physical System,” in Proceedings of the 7th IEEE International Symposium on Embedded Computing and System Design (ISED-2017), India, Dec. 2017, pp. 1–6, DOI: 10.1109/ISED.2017.8303906. |
| @inproceedings{chattopadhyay2017securitySMAT, | title | = | {Security of Autonomous Vehicle as a Cyber{\hyp}physical System}, | author | = | {Chattopadhyay, Anupam and Lam, Kwok Yan}, | booktitle | = | {Proceedings of the 7th IEEE International Symposium on Embedded Computing and System Design (ISED-2017)}, | year | = | {2017}, | month | = | dec, | pages | = | {1--6}, | address | = | {India}, | doi | = | {10.1109/ISED.2017.8303906}, | } |
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[S20] | C. Zhou, M. Wu, and S. K. Lam, “Fast and Accurate Pedestrian Detection using Dual-stage Group Cost-sensitive RealBoost with Vector Form Filters,” in Proceedings of the 25th ACM Multimedia, Mount View, USA, Oct. 2017, pp. 735–743, DOI: 10.1145/3123266.3123303. |
| @inproceedings{zhou2017fastSMAT, | title | = | {Fast and Accurate Pedestrian Detection using Dual{\hyp}stage Group Cost{\hyp}sensitive RealBoost with Vector Form Filters}, | author | = | {Zhou, Chengju and Wu, Meiqing and Lam, Siew Kei}, | booktitle | = | {Proceedings of the 25th ACM Multimedia}, | year | = | {2017}, | month | = | oct, | pages | = | {735--743}, | address | = | {Mount View, USA}, | doi | = | {10.1145/3123266.3123303}, | } |
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[S19] | T. Perera, A. Prakash, and T. Srikanthan, “A Scalable Heuristic Algorithm for Demand Responsive Transportation for First Mile Transit,” in Proceedings of the 21st IEEE International Conference on Intelligent Engineering Systems, Larnaca, Cyprus, Oct. 2017, pp. 157–162, DOI: 10.1109/INES.2017.8118547. |
| @inproceedings{perera2017scalableSMAT, | title | = | {A Scalable Heuristic Algorithm for Demand Responsive Transportation for First Mile Transit}, | author | = | {Perera, Thilina and Prakash, Alok and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 21st IEEE International Conference on Intelligent Engineering Systems}, | year | = | {2017}, | month | = | oct, | pages | = | {157--162}, | address | = | {Larnaca, Cyprus}, | doi | = | {10.1109/INES.2017.8118547}, | } |
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[S18] | S.-K. Lam, T. C. Lim, M. Wu, B. Cao, and B. Jasani, “Data-path Unrolling with Logic Folding for Area-time-efficient FPGA-based FAST Corner Detector,” Journal of Real-Time Image Processing, Oct. 2017, DOI: 10.1007/s11554-017-0725-0. |
| @article{Lam2017DataSMAT, | title | = | {Data{\hyp}path Unrolling with Logic Folding for Area{\hyp}time{\hyp}efficient {FPGA}{\hyp}based {FAST} Corner Detector}, | author | = | {Lam, Siew-Kei and Lim, Teck Chuan and Wu, Meiqing and Cao, Bin and Jasani, Bhavan}, | journal | = | {Journal of Real-Time Image Processing}, | year | = | {2017}, | month | = | oct, | doi | = | {10.1007/s11554-017-0725-0}, | } |
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[S17] | K. Garg, A. Prakash, and T. Srikanthan, “Low Complexity Techniques for Robust Real-time Traffic Incident Detection,” in Proceedings of the 20th IEEE International Conference on Intelligent Transportation Systems (ITSC), Yokohama, Japan, Oct. 2017, pp. 1–8, DOI: 10.1109/ITSC.2017.8317740. |
| @inproceedings{garg2017lowSMAT, | title | = | {Low Complexity Techniques for Robust Real{\hyp}time Traffic Incident Detection}, | author | = | {Garg, Kratika and Prakash, Alok and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 20th IEEE International Conference on Intelligent Transportation Systems (ITSC)}, | year | = | {2017}, | month | = | oct, | pages | = | {1--8}, | address | = | {Yokohama, Japan}, | doi | = | {10.1109/ITSC.2017.8317740}, | } |
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[S16] | C. Zhou, M. Wu, and S. K. Lam, “Group Cost-sensitive Boosting with Multi-scale Decorrelated Filters for Pedestrian Detection,” in Proceedings of the Twenty Eighth British Machine Vision Conference, London, UK: BMVA Press, Sep. 2017, pp. 48.1–48.12, DOI: 10.5244/C.31.48. |
| @inproceedings{zhou2017groupSMAT, | title | = | {Group Cost{\hyp}sensitive Boosting with Multi{\hyp}scale Decorrelated Filters for Pedestrian Detection}, | author | = | {Zhou, Chengju and Wu, Meiqing and Lam, Siew Kei}, | booktitle | = | {Proceedings of the Twenty Eighth British Machine Vision Conference}, | year | = | {2017}, | month | = | sep, | pages | = | {48.1--48.12}, | address | = | {London, UK}, | doi | = | {10.5244/C.31.48}, | publisher | = | {BMVA Press}, | } |
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[S15] | S. V. D. Kumar, S. Patranabis, J. Breier, D. Mukhopadhyay, S. Bhasin, A. Chattopadhyay, and A. Baksi, “A Practical Fault Attack on ARX-like Ciphers with a Case Study on ChaCha20,” in Proceedings of the 2017 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), Taipei, Taiwan, Sep. 2017, pp. 33–40, DOI: 10.1109/FDTC.2017.14. |
| @inproceedings{kumar2017practicalSMAT, | author | = | {Kumar, S. V. Dilip and Patranabis, Sikhar and Breier, Jakub and Mukhopadhyay, Debdeep and Bhasin, Shivam and Chattopadhyay, Anupam and Baksi, Anubhab}, | booktitle | = | {Proceedings of the 2017 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC)}, | title | = | {A Practical Fault Attack on {ARX}{\hyp}like Ciphers with a Case Study on {ChaCha20}}, | year | = | {2017}, | month | = | sep, | pages | = | {33--40}, | doi | = | {10.1109/FDTC.2017.14}, | address | = | {Taipei, Taiwan}, | } |
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[S14] | S. P. Kadiyala, V. K. Pudi, and S. K. Lam, “Approximate Compressed Sensing for Hardware-efficient Image Compression,” in Proceedings of the 30th IEEE International System-on-Chip Conference (SOCC), Munich, Germany, Sep. 2017, pp. 340–345, DOI: 10.1109/SOCC.2017.8226074. |
| @inproceedings{kadiyala2017approximateSMAT, | title | = | {Approximate Compressed Sensing for Hardware{\hyp}efficient Image Compression}, | author | = | {Kadiyala, Sai Praveen and Pudi, Vikram Kumar and Lam, Siew Kei}, | booktitle | = | {Proceedings of the 30th IEEE International System{\hyp}on{\hyp}Chip Conference (SOCC)}, | year | = | {2017}, | month | = | sep, | pages | = | {340--345}, | address | = | {Munich, Germany}, | doi | = | {10.1109/SOCC.2017.8226074}, | } |
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[S13] | G. Jiang, S. K. Lam, S. Yidan, L. Tu, and J. Wu, “Joint Charging Tour Planning and Depot Positioning for Wireless Sensor Networks Using Mobile Chargers,” IEEE/ACM Transactions on Networking, vol. 25, pp. 2250–2266, Aug. 2017, ISSN: 1063-6692, DOI: 10.1109/TNET.2017.2684159. |
| @article{jiang2017jointSMAT, | title | = | {Joint Charging Tour Planning and Depot Positioning for Wireless Sensor Networks Using Mobile Chargers}, | author | = | {Jiang, Guiyuan and Lam, Siew Kei and Yidan, Sun and Tu, Lijia and Wu, Jigang}, | journal | = | {IEEE/ACM Transactions on Networking}, | volume | = | {25}, | year | = | {2017}, | month | = | aug, | pages | = | {2250--2266}, | issn | = | {1063-6692}, | doi | = | {10.1109/TNET.2017.2684159}, | } |
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[S12] | D. Wijesundera, A. Ihalage, A. Prakash, and T. Srikanthan, “High Speed Performance Estimation of Embedded Hard-core Processors in FPGA-based SoCs,” in Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Bochum, Germany, Jun. 2017, pp. 2:1–2:6, DOI: 10.1145/3120895.3120902. |
| @inproceedings{wijesundera2017highSMAT, | title | = | {High Speed Performance Estimation of Embedded Hard{\hyp}core Processors in {FPGA}{\hyp}based SoCs}, | author | = | {Wijesundera, Deshya and Ihalage, Achintha and Prakash, Alok and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies}, | year | = | {2017}, | month | = | jun, | pages | = | {2:1--2:6}, | address | = | {Bochum, Germany}, | isbn | = | {978-1-4503-5316-8}, | doi | = | {10.1145/3120895.3120902}, | } |
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[S11] | K. Herath, A. Prakash, J. Guiyuan, and T. Srikanthan, “Communication-aware Partitioning for Energy Optimization of Large FPGA Designs,” in Proceedings of the on Great Lakes Symposium on VLSI 2017, Banff, Alberta, Canada, May 2017, pp. 407–410, DOI: 10.1145/3060403.3060441. |
| @inproceedings{Herath2017CPECommunicationSMAT, | title | = | {Communication{\hyp}aware Partitioning for Energy Optimization of Large {FPGA} Designs}, | author | = | {Herath, Kalindu and Prakash, Alok and Guiyuan, Jiang and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the on Great Lakes Symposium on VLSI 2017}, | year | = | {2017}, | month | = | may, | pages | = | {407--410}, | address | = | {Banff, Alberta, Canada}, | doi | = | {10.1145/3060403.3060441}, | } |
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[S10] | A. Chattopadhyay, A. Prakash, and M. Shafique, “Secure Cyber-physical Systems: Current Trends, Tools and Open Research Problems,” in Proceedings of the 2017 Design, Automation Test in Europe Conference (DATE), Lausanne, Switzerland, Mar. 2017, pp. 1104–1109, DOI: 10.23919/DATE.2017.7927154. |
| @inproceedings{chattopadhyay2017secureSMAT, | author | = | {Chattopadhyay, Anupam and Prakash, Alok and Shafique, Muhammad}, | booktitle | = | {Proceedings of the 2017 Design, Automation Test in Europe Conference (DATE)}, | title | = | {Secure Cyber{\hyp}physical Systems: Current Trends, Tools and Open Research Problems}, | year | = | {2017}, | month | = | mar, | pages | = | {1104--1109}, | doi | = | {10.23919/DATE.2017.7927154}, | address | = | {Lausanne, Switzerland}, | } |
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[S9] | D. Bhattacharjee, V. Pudi, and A. Chattopadhyay, “SHA-3 Implementation Using ReRAM based In-memory Computing Architecture,” in Proceedings of the 18th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, USA, Mar. 2017, pp. 325–330, DOI: 10.1109/ISQED.2017.7918336. |
| @inproceedings{bhattacharjee2017shaSMAT, | title | = | {{SHA-3} Implementation Using ReRAM based In{\hyp}memory Computing Architecture}, | author | = | {Bhattacharjee, Debjyoti and Pudi, Vikramkumar and Chattopadhyay, Anupam}, | booktitle | = | {Proceedings of the 18th International Symposium on Quality Electronic Design (ISQED)}, | year | = | {2017}, | month | = | mar, | pages | = | {325--330}, | address | = | {Santa Clara, CA, USA}, | doi | = | {10.1109/ISQED.2017.7918336}, | } |
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[S8] | A. Easwaran, A. Chattopadhyay, and S. Bhasin, “A Systematic Security Analysis of Real-time Cyber-physical Systems,” in Proceedings of the 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), Chiba, Japan, Jan. 2017, pp. 206–213, DOI: 10.1109/ASPDAC.2017.7858321. |
| @inproceedings{easwaran2017systematicSMAT, | title | = | {A Systematic Security Analysis of Real{\hyp}time Cyber{\hyp}physical Systems}, | author | = | {Easwaran, Arvind and Chattopadhyay, Anupam and Bhasin, Shivam}, | booktitle | = | {Proceedings of the 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)}, | year | = | {2017}, | month | = | jan, | pages | = | {206--213}, | address | = | {Chiba, Japan}, | doi | = | {10.1109/ASPDAC.2017.7858321}, | } |
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[S7] | D. Wijesundera, A. Prakash, and T. Srikanthan, “Rapid Design Space Exploration for Soft Core Processor Customization and Selection,” in Proceedings of the 2016 International Conference on Field-Programmable Technology (FPT), Xi'an, China, Dec. 2016, pp. 185–188, DOI: 10.1109/FPT.2016.7929529. |
| @inproceedings{wijesundera2016rapidSMAT, | title | = | {Rapid Design Space Exploration for Soft Core Processor Customization and Selection}, | author | = | {Wijesundera, Deshya and Prakash, Alok and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 2016 International Conference on Field{\hyp}Programmable Technology (FPT)}, | year | = | {2016}, | month | = | dec, | pages | = | {185--188}, | address | = | {Xi'an, China}, | doi | = | {10.1109/FPT.2016.7929529}, | } |
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[S6] | V. Pudi, A. Chattopadhyay, and T. Srikanthan, “Modified Projected Landweber Method for Compressive-sensing Reconstruction of Images with Non-orthogonal Matrices,” in Proceedings of the 2016 International Symposium on Integrated Circuits (ISIC), Singapore, Dec. 2016, pp. 1–4, DOI: 10.1109/ISICIR.2016.7829716. |
| @inproceedings{pudi2016modifiedSMAT, | title | = | {Modified Projected Landweber Method for Compressive{\hyp}sensing Reconstruction of Images with Non{\hyp}orthogonal Matrices}, | author | = | {Pudi, Vikramkumar and Chattopadhyay, Anupam and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 2016 International Symposium on Integrated Circuits (ISIC)}, | year | = | {2016}, | month | = | dec, | pages | = | {1--4}, | address | = | {Singapore}, | doi | = | {10.1109/ISICIR.2016.7829716}, | } |
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[S5] | M. Wu, C. Zhou, and T. Srikanthan, “Robust and Low Complexity Obstacle Detection and Tracking,” in 2016 IEEE 19th International Conference on Intelligent Transportation Systems (ITSC), Brazil, Nov. 2016, pp. 1249–1254, DOI: 10.1109/ITSC.2016.7795717. |
| @inproceedings{Wu2016RobustSMAT, | title | = | {Robust and Low Complexity Obstacle Detection and Tracking}, | author | = | {Wu, Meiqing and Zhou, Chengju and Srikanthan, Thambipillai}, | booktitle | = | {2016 IEEE 19th International Conference on Intelligent Transportation Systems (ITSC)}, | year | = | {2016}, | month | = | nov, | pages | = | {1249--1254}, | address | = | {Brazil}, | doi | = | {10.1109/ITSC.2016.7795717}, | } |
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[S4] | G. R. Jagadeesh and T. Srikanthan, “Heuristic Optimizations for High-speed Low-latency Online Map Matching with Probabilistic Sequence Models,” in Proceedings of the 19th International Conference on Intelligent Transportation Systems (ITSC 2016), Rio de Janeiro, Brazil, Nov. 2016, pp. 2565–2570, DOI: 10.1109/ITSC.2016.7795968. |
| @inproceedings{jagadeesh2016heuristicSMAT, | title | = | {Heuristic Optimizations for High{\hyp}speed Low{\hyp}latency Online Map Matching with Probabilistic Sequence Models}, | author | = | {Jagadeesh, George Rosario and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 19th International Conference on Intelligent Transportation Systems (ITSC 2016)}, | year | = | {2016}, | month | = | nov, | pages | = | {2565--2570}, | address | = | {Rio de Janeiro, Brazil}, | doi | = | {10.1109/ITSC.2016.7795968}, | } |
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[S3] | A. Chattopadhyay, V. Pudi, A. Baksi, and T. Srikanthan, “FPGA Based Cyber Security Protocol for Automated Traffic Monitoring Systems: Proposal and Implementation,” in Proceedings of the 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, PA, USA, Jul. 2016, pp. 18–23, DOI: 10.1109/ISVLSI.2016.97. |
| @inproceedings{chattopadhyay2016fpgaSMAT, | title | = | {{FPGA} Based Cyber Security Protocol for Automated Traffic Monitoring Systems: Proposal and Implementation}, | author | = | {Chattopadhyay, Anupam and Pudi, Vikramkumar and Baksi, Anubhab and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)}, | year | = | {2016}, | month | = | jul, | pages | = | {18--23}, | address | = | {Pittsburgh, PA, USA}, | doi | = | {10.1109/ISVLSI.2016.97}, | } |
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[S2] | D. Wijesundera, A. Prakash, S. K. Lam, and T. Srikanthan, “Exploiting Configuration Dependencies for Rapid Area-efficient Customization of Soft-core Processors,” in Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, Sankt Goar, Germany, May 2016, pp. 163–172, DOI: 10.1145/2906363.2906385. |
| @inproceedings{wijesundera2016exploitingSMAT, | title | = | {Exploiting Configuration Dependencies for Rapid Area{\hyp}efficient Customization of Soft{\hyp}core Processors}, | author | = | {Wijesundera, Deshya and Prakash, Alok and Lam, Siew Kei and Srikanthan, Thambipillai}, | booktitle | = | {Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems}, | year | = | {2016}, | month | = | may, | pages | = | {163--172}, | address | = | {Sankt Goar, Germany}, | isbn | = | {978-1-4503-4320-6}, | doi | = | {10.1145/2906363.2906385}, | } |
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[S1] | K. Garg, S. K. Lam, T. Srikanthan, and A. Vedika, “Real-time Road Traffic Density Estimation Using Block Variance,” in Proceedings of the 2016 IEEE Winter Conference on Applications of Computer Vision (WACV), Lake Placid, NY, USA, Mar. 2016, pp. 1–9, DOI: 10.1109/WACV.2016.7477607. |
| @inproceedings{garg2016realSMAT, | title | = | {Real{\hyp}time Road Traffic Density Estimation Using Block Variance}, | author | = | {Garg, Kratika and Lam, Siew Kei and Srikanthan, Thambipillai and Vedika, Agarwal}, | booktitle | = | {Proceedings of the 2016 IEEE Winter Conference on Applications of Computer Vision (WACV)}, | year | = | {2016}, | month | = | mar, | pages | = | {1--9}, | address | = | {Lake Placid, NY, USA}, | doi | = | {10.1109/WACV.2016.7477607}, | } |
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